Visual Instruction Set : VIS

Visual Instruction Set (or VIS) is a SIMD instruction set used on the SPARC series of CPUs, implented only on the 64-bit UltraSPARC processors.

In hardware terms VIS is somewhat limited. It re-uses the existing floating point registers to hold multiple 8, 16, or 32-bit integer values. This can have a negative performance impact on the system when code attempts to run FPU and VIS instructions in succession, causing the registers to have to be re-loaded. In this respect VIS is something of an "old" design like MMX, unlike more modern SIMD architechtures like AltiVec.

VIS includes a number of operations primarily for graphics support, but has more of them than other integer-only SIMD sets. These include 3D to 2D conversion, edge processing and pixel distance.

Links:

VIS Instruction Set User's Manual (http://www.nondot.org/sabre/os/files/Processors/VISInstructionSetUsersManual.pdf)

		Visual Instruction Set : VIS
		Visual Instruction Set (or VIS) is a SIMD instruction set used on the SPARC series of CPUs, implented only on the 64-bit UltraSPARC processors. In hardware terms VIS is somewhat limited. It re-uses the existing floating point registers to hold multiple 8, 16, or 32-bit integer values. This can have a negative performance impact on the system when code attempts to run FPU and VIS instructions in succession, causing the registers to have to be re-loaded. In this respect VIS is something of an "old" design like MMX, unlike more modern SIMD architechtures like AltiVec. VIS includes a number of operations primarily for graphics support, but has more of them than other integer-only SIMD sets. These include 3D to 2D conversion, edge processing and pixel distance. Links: VIS Instruction Set User's Manual (http://www.nondot.org/sabre/os/files/Processors/VISInstructionSetUsersManual.pdf)
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